Optimal Design of a New Cascaded Multilevel Inverter Topology With Reduced Switch Count

 Abstract

Optimal Design of Reduced-Switch Count Cascaded Inverter Multilevel inverters (MLIs) are a great development for industrial and renewable energy applications due to their dominance over conventional two-level inverter with respect to size, rating of switches, filter requirement, and efficiency. A new single-phase cascaded MLI topology is suggested in this paper. The proposed MLI topology is designed with the aim of reducing the number of switches and the number of dc voltage sources with modularity while having a higher number of levels at the output. For the determination of the magnitude of dc voltage sources and a number of levels in the cascade connection, three different algorithms are proposed. Optimal Design of Reduced-Switch Count Cascaded Inverter The optimization of the proposed topology is aimed at achieving a higher number of levels while minimizing other parameters.

A detailed comparison is made with other comparable MLI topologies to prove the superiority of the proposed structure. A selective harmonic elimination pulse width modulation technique is used to produce the pulses for the switches to achieve high-quality voltage at the output. Finally, the experimental results are provided for the basic unit with 11 levels and for cascading of two such units to achieve 71 levels at the output. cascaded multilevel inverters have gained popularity in the power electronics industry due to their ability to generate high-quality waveforms with reduced harmonic distortion. However, the main disadvantage of these topologies is the high number of switches required to achieve the desired output voltage levels, which can lead to increased complexity and cost.

keywords

Basic unit, cascaded inverter, multilevel inverter (MLI), selective harmonic elimination,
SHEPWM, optimization, reduce switch count.