Hybrid Three-Phase Transformer-Based Multilevel Inverter with Reduced Component Count

Abstract

This paper proposes a novel three-phase transformer-based multilevel inverter (MLI) topology to maximize the output voltage levels for high-power high-voltage applications while reducing component counts as compared to its transformer-based counterparts. The proposed hybrid topology is formed by connecting a three-level T-type module with full H-bridge cells through single-phase transformers. The T- type module is fixed while the full H-bridge cell can be repeated for enlarging the output voltage levels without increasing the voltage stress on switches. Key features of the proposed topology include low part count, capacitor-free, diode-free, voltage boosting, simple control, and modularity. Within the framework, a simple low-frequency pulse width modulation (LFPWM) switching scheme is used to control the output voltage, and the working principle is detailed for seven-, nine-, and N-level operation. The operability and performance of the proposed topology are numerically verified and experimentally validated at different loads. Moreover, its conversion efficiency is experimentally examined. Finally, a comparative study with existing transformer-based MLI circuits is conducted to prove its key merits.

Keywords

Cascaded-transformer multi level inverter (CTMI), DC-AC converter, hybrid multilevel inverter (MLI), multilevel inverter topology.

Circuit Diagram:

                   Figure 1. The Circuit Configuration Of The Proposed Transformer Based MLI Topology.

Expected Simulation Results:

    Figure 2. Simulation Waveforms Of The Proposed Topology When _ Is 1. (A) Pole Voltage Va0                  Synthesizing. (B) Pole Voltages Va0, Vb0, And Vc0. (C) Line Voltages Vab, Vbc, And Vca.

     Figure 3. Simulation Waveforms When _ Is 1. (A) Vab, Van, And Ian At Resistive Load. (B) Vab,                                            Van, And Ian At Resistive-Inductive Load.

         Figure 4. Simulation Waveforms When _ Is 1.5. (A) Pole Voltage Va0 Synthesizing. (B) Pole                                   Voltages Va0, Vb0, And Vc0. (C) Line Voltages Vab, Vbc, And Vca.

               Figure 5. Simulation Waveforms When _ Is 1.5. (A) Vab, Van, And Ian At Resistive Load. (B)                                        Vab, Van, And Ian At Resistive-Inductive Load.

Conclusion

This paper proposes a novel three-phase transformer-based nine-level inverter with a reduced component count, having the key features of being capacitor-, diode-free, and low counts of DC sources, switches, and transformers. The pro- posed circuit can increase the voltage level count to N levels without increasing the voltage stress across the switches, being a promising candidate for high-power high-voltage applications. Further, it has beneficial features of modularity, voltage boosting and simple structure. The working principle of the proposed topology was theoretically demonstrated, numerically verified, and experimentally validated through the in-house setup. Finally, the advantages of the proposed topology, in terms of component counts, are highlighted by a comparative study.

References

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