A Dual-Active-Bridge-based Fully-ZVS HF-isolated Inverter With Low Decoupling Capacitance

Abstract

This paper proposes a novel dual-active bridge (DAB)-based high-frequency-isolated DC-AC converter topology suitable for PV micro inverter applications. The circuit configuration on the secondary sides of the employed three-winding transformer results in high-frequency current injection into each of the switch-nodes, thereby making zero-voltage-switching (ZVS) operation of the devices possible. The topology achieves this functionality while using the same number of devices as conventional two-stage and single-stage high-frequency-link or DAB-based solutions. Further, following a control-oriented power pulsation decoupling strategy involving dynamic variation of phase-shift, twice line frequency energy buffering can be handled on the high-voltage secondary side, thereby resulting in reduction in decoupling capacitance requirement. Working principle of the circuit and the associated control scheme is described followed by detailed ZVS analysis. Simulation studies and experimental tests on a 310 W prototype verify circuit operation and exhibit efficiency improvements compared to a similar two-stage solution.

 

Index Terms

1.      Dual-active-bridge

2.      Micro inverter

3.      Zero-voltage switching (ZVS)

4.      Power decoupling

 

Proposed Diagram:

Fig. 1. The proposed inverter topology in standalone configuration. The topological configuration on the secondary side helps in realizing ZVS.

Expected Simulation Results:

Fig. 2. Transformer voltage and current waveforms (a) over the full line cycle. (b) Near peak of output ac line cycle. Operation corresponds to mode 1b. (c) Near zero crossing of output ac line cycle. Operation corresponds to mode 2a.

Fig. 3. Illustrating occurrence of ZVS for all switches over the full 50 Hz cycle for a unity power-factor load. (a) primary-side switches (b) secondary-side switches not directly connected to the load (c) secondary-side switches directly connected to the load. The instantaneous current through the switches (light blue) and the current at the turn-on instant (dark blue) are shown. It can be observed that the turn-on currents are negative throughout the line cycle indicating ZVS turn-on. It can also be seen that for the secondary-side devices it is more difficult to achieve ZVS near the line-cycle peaks, while for the primary-side devices the same is true near the zero-crossings.

 

 

Fig. 4. Zoomed view of switch currents illustrating occurrence of ZVS under respective worst-case conditions for a unity power-factor load. (a) primary-side switches near zero crossing of vac. (b) secondary-side switches not directly connected to the load near peak of vac. (c) secondary-side switches directly connected to the load near peak of vac.

 

Conclusion

 

A novel dual-active bridge-based isolated micro inverter topology with a current-stiff interface for the PV port is proposed. The key advantage of the proposed solution is its ability to realize ZVS turn-on of all switches across the ac line cycle, unlike conventional two-stage solutions, which miss ZVS over half the ac line cycle. The topology achieves this functionality without using additional circuitry, as is required with ZVT-based solutions. Though the proposed circuit introduces additional conduction losses compared to two-stage topologies, ZVS operation can lead to better efficiency in cases where switching losses are significant, as is experimentally demonstrated. Further, by employing a control strategy involving dynamic variation of phase-shift over an ac line cycle, low-frequency power decoupling can be handled by the high voltage secondary dc bus capacitor. This results in substantial reduction in decoupling capacitance requirement, allowing a film-capacitor-based implementation, which is not possible in standard single-stage topologies.

References

 

[1] S. Chakraborty and S. Chattopadhyay, “A Multi-port, Isolated PV Micro inverter with Low Decoupling Capacitance & Integrated Battery Charger,” IEEE Energy Conversion and Congress Exposition (ECCE) 2016, Sep. 2016.

[2] N. Sukesh, M. Pahlevaninezhad, and P. K. Jain, “Analysis and implementation of a single-stage flyback pv microinverter with soft switching,” IEEE Trans. Ind. Electron., vol. 61(4), pp. 1819-1833, Apr. 2014.

[3] Y. Li and R. Oruganti, “A low cost flyback ccm inverter for ac module application,” IEEE Trans. Power Electron., vol. 27(3), pp. 1295-1303, Mar. 2012.

[4] N. Kummari, S.Chakraborty and S. Chattopadhyay, “An Isolated High- Frequency Link Micro inverter Operated with Secondary-Side Modulation for Efficiency Improvement,” IEEE Trans. Power Electron., vol. 33(3), pp. 2187-2200, Mar. 2018.

[5] S. K. Mazumder and A. K. Rathore, “Primary-Side-Converter-Assisted Soft-Switching Scheme for an AC/AC Converter in a Cyclo converter- Type High-Frequency-Link Inverter,” IEEE Trans. Ind. Electron., vol. 58(9), pp. 4161-4166, Sept. 2011.

 

Hybrid Structure of Static Var Compensator And Hybrid Active Power Filter (SVC//HAPF) For Medium-Voltage Heavy Loads Compensation

Abstract

In this paper, the structure, modeling, parameter design, and control method are proposed for a new hybrid structure of a static var compensator in parallel with a hybrid active powerfilter (SVC//HAPF). The SVC part of the SVC//HAPF is used to dynamically compensate the reactive power. And, the HAPF part is used to provide harmonic power and small amount of reactive power compensation. Due to the large fundamental voltage drop on coupling the LC part, the active inverter part of the SVC//HAPF has low voltage rating. Meanwhile, the parallel-connected SVC acts as a current divider to reduce the active inverter current. Therefore, the proposed SVC//HAPF shows the great promise in compensating harmonic current and wide-range reactive power with a low (both) voltage and current rating active inverter part. To show the advantages of the proposed SVC//HAPF, simulation comparisons among the active power filter (APF), HAPF, SVC in series with HAPF (SVC−HAPF), and the proposed SVC//HAPF are provided. Finally, experimental results based on the laboratory-scaled hardware prototype are given to show the validity of the SVC//HAPF.

Index Terms

 

1.      Active power filter (APF)

2.       Harmonic current compensation

3.      Hybrid APF (HAPF)

4.      Reactive power compensation

5.      Static var compensator (SVC)

Circuit diagram:

Fig. 1. Circuit configurations of the SVC//HAPF.

Expected Simulation Results:

Fig.2. Waveforms of source current, compensating current, average switching frequency, and trigger signals by using: (a) proportional gain control and (b) hysteresis band control.

 

Fig. 3. Source current harmonic spectrum by using (a) proportional gain control and (b) hysteresis band control.

 

Fig. 4. Waveforms of load voltage, dc-link voltage, load current, source current, and compensating inverter current for harmonic loads current compensation (QLx = 0) and harmonic and reactive power loads compensation by using: (a) APF, (b) HAPF, (c) SVC–HAPF, and (d) the proposed SVC//HAPF.

 

Conclusion

 

In this paper, a new hybrid structure of SVC in parallel with HAPF(SVC//HAPF) in three-phase power system was proposed and discussed as a cost-effective compensator for medium voltage heavy loads compensation. The SVC part was used to dynamically compensate the reactive power, while the HAPF was used to provide harmonic and low fixed amount of reactive power compensation. Moreover, the structure, modeling, operation principle, parameter design, and control method of the SVC//HAPF were proposed and discussed. Finally, the representative simulation and experimental results were given to show that the SVC//HAPF has the great promise in wide reactive power compensation range with both low-voltage and current inverter rating characteristics.

References

[1] A. Hamadi, S. Rahmani, and K. Al-Haddad, “A hybrid passive filter configuration for VAR control and harmonic compensation,” IEEE Trans. Ind. Electron., vol. 57, no. 7, pp. 2419–2434, Jul. 2010.

[2] L. Wang, C. S. Lam, and M. C. Wong, “Design of a thyristor controlled LC compensator for dynamic reactive power compensation in smart grid,” IEEE Trans. Smart. Grid., vol. 8, no. 1, pp. 409–417, Jan. 2017.

[3] J. Chen, X. Zhang, and C.Wen, “Harmonics attenuation and power factor correction of a more electric aircraft power grid using active power filter,” IEEE Trans. Ind. Electron., vol. 63, no. 12, pp. 7310–7319, Dec. 2016.

[4] Z. Shu, M. Liu, L. Zhao, S. Song, Q. Zhou, and X. He, “Predictive harmonic control and its optimal digital implementation for MMC based active power filter,” IEEE Trans. Ind. Electron., vol. 63, no. 8, pp. 5244–5254, Aug. 2016.

[5] X. Sun et al., “Study of a novel equivalent model and a long-feeder simulator-based active power filter in a closed-loop distribution feeder,” IEEE Trans. Ind. Electron., vol. 63, no. 5, pp. 2702–2712, May 2016.

A Novel Bidirectional T-type Multilevel Inverter for Electric Vehicle Applications

Abstract

This paper introduces a new configuration of bi-directional multilevel converter in electric vehicle (EV) applications. It has multilevel DC-DC converter with a direct current (DC) link capacitor voltage balance feature. The multilevel DC-DC converter operates in bi-directional manner, which is a fundamental requirement in EVs. Compared to the conventional configurations, the proposed one only implements two extra power switches and a capacitor to balance the voltage of the T-type MLI capacitor over a complete drive cycle or at fault conditions. Therefore, no extra isolated sensor, control loops and/or special switching pattern are required. Moreover, the proposed configuration due to the high frequency cycle-bycycle voltage balance between 𝑪𝑪𝒏𝒏 and 𝑪𝑪𝒑𝒑 the bulky electrolytic capacitors used in T-type MLI are replaced with longer life more reliable film capacitors. This will result in a size and weight reduction of the converter by 20%. This allows more real estate for the EV battery in the chassis’ space envelope; to increase its capacity. The proposed configuration is tested and validated using a Matlab/Simulink simulation model. A laboratory prototype 1 kW is built to provide the proof of Concept results as well.

Keywords

Multilevel inverter, T-type MLI, Multilevel DC-DC converter, bi-directional converter, Capacitor voltage balance, natural voltage balance;

Proposed Diagram:

Fig. 1. The proposed configuration, a multilevel bidirectional DC-DC converter connected to the T-type MLI.

Expected Simulation Results:

Fig. 2. Three phase line to line output voltage.

Fig.3. Low frequency ripple on capacitors voltage Vcn, Vcm and Vcp in corresponding to the three phase output power; three phase output voltage; and three phase output current.

Fig. 10. Capacitor voltage at steady state.

Fig. 4. Duty cycle of the dc-dc boost with the low frequency 180 Hz superimposed ripple; and inductor current at motoring

(a) Step change in the dc link voltage reference from 275V to 375V at t=0.05s; capacitors voltage Vcn, Vcm and Vcp; three phase output voltage; and; three phase output current.

(b) Capacitors voltage; dc-dc duty cycle; and the input current at fault condition by connecting 20 ohm resistor to Cn at t=0.02s.

(c) Voltage of CP and CN at fault condition in conventional configuration.

Fig. 5 The voltage of the converter’s capacitor at step change and fault condition.

Conclusion

This paper presents a new integration of the five levels Ttype multilevel inverter with a  modified bi-directional dc-dc multilevel converter for electric vehicle applications. While the T-type MLI utilize more power switches compared to the conventional voltage source inverter. It generates a higher number of output voltage levels utilizing power switches with half of the peak inverse voltage. However, if such converter is connected to a conventional bi-directional dc-dc converter, the converter power switches have to be designed to withstand the full voltage of the dc bus. Moreover, such conventional configuration needs an addition of voltage balance circuit or special switching pattern with feedback and control loops to insure the voltage balance of the dc capacitors. On the contrary, the proposed configuration takes advantage of the high frequency cycle-by-cycle voltage balance between the dc bus capacitors CN and CP as explained in section II, these capacitors are designed according to the dc-dc input stage high frequency ripple not the line low frequency ripple at 180Hz (triple the rated frequency). Therefore, the required capacitance is reduced from several hundreds uF capacitors to tenth uF capacitors, allowing for replacing electrolytic capacitors with film capacitors. Such advantage of the proposed converter doesn’t interfere with its ability to operate in step-up mode in motoring and in step-down mode in braking the electric motor. Moreover, the peak inverse voltage of all the power switches and the rated voltage of all capacitors is limited to half of the peak ac output voltage, which reduces the voltage stress and allow for implementing higher efficiency power switches in the dc-dc side similar to the ones in the T-type MLI side. The proposed configuration has been tested and validated though simulation model and experimental prototype. The results are compared and discussed, to demonstrate the advantages of the proposed configuration over the conventional one available in the market. In addition; efficiency levels are measured to be around 90%, which is far better than the market range. This work is to be extended by testing the proposed configuration against a complete EV driving cycle at low, medium and high speed to study evaluate the performance of operating EV with a higher rated voltage motors and its impact on the kWh per mileage consumption.

References

[1] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. Wu and e. al., "Recent Advances and Industrial Applications of Multilevel Converters," IEEE Transactions on Industrial Electronics, vol. 57, no. 8, pp. 2553-2580, Aug. 2010.

 [2] J. Rodriguez, J.-S. Lai and F. Z. Peng, "Multilevel inverters: a survey of topologies, controls, and applications," IEEE Transactions on Industrial Electronics, vol. 49, no. 4, pp. 724-738, Aug 2002.

 [3] M. Z. Youssef, K. Woronowicz, K. Aditya, N. A. Azeez and S. S. Williamson, "Design and Development of an Efficient Multilevel DC/AC Traction Inverter for Railway Transportation Electrification," IEEE Transactions on Power Electronics, vol. 31, no. 4, pp. 3036-3042, April 2016.

[4] A. Nabae, I. Takahashi and H. Akagi, "A new neutral-point-clamped PWMinverter," IEEETrans.Ind.Appl, Vols. IA-17, no. 5, p. 1981, 518– 523.

[5] M.F.Escalante, J.C.Vannier and A.Arzandé, "Flying capacitor multilevel inverters and DTC motor drive applications," IEEETrans.Ind. Electron., vol. 49, no. 4, p. 809–815, 202.

A 13-levels Module (K-Type) with two DC sources for Multilevel Inverters

 Abstract

This paper presents a new reconfiguration module for asymmetrical multilevel inverters in which the capacitors are used as the DC links to creates the levels for staircase waveforms. This configuration of multilevel converter makes a reduction in DC sources. On the other hand, it is possible to generate 13 levels with lower DC sources. The proposed module of multilevel inverter generates 13 levels with two unequal DC sources (2VDC and 1VDC). It also involves two chargeable capacitors and 14 semiconductor switches. The capacitors are self-charging without any extra circuit. The lower number of components makes it desirable to use in wide range of applications. The module is schematized as two back-to-back T-type inverters and some other switches around it. Also, it can be connected as cascade modular which lead to a modular topology with more voltage levels at higher voltages. The proposed module makes the inherent creation of the negative voltage levels without any additional circuit (such as H-bridge circuit). Nearest level control switching modulation (NLC) scheme is applied to achieve high quality sinusoidal output voltage. Simulations are executed in MATLAB/Simulink and a prototype is implemented in the power electronics laboratory which the simulation and experimental results show a good performance.

Index Terms

1.      Asymmetric

2.      Capacitors

3.      Multilevel inverter

4.      Power electronics

5.      Self-charging

6.      Nearest level control switching

Block Diagram:

Fig.1 The general conceptual asymmetric MLIs with capacitors

Expected Simulation Results:

Fig.2 The waveform of output Voltage (simulation) for the proposed module: (a) Waveform (b) Harmonics spectrums.

Fig.3 The waveform of output Voltage (simulation) for the first cascade topology (25 Levels): (a) Waveform (b) Harmonics spectrums.

Fig.4 The waveform of output Voltage (simulation) for the second cascade topology (169 Levels): (a) Waveform (b) Harmonics spectrums.

Conclusion

This paper introduced one module for asymmetrical multilevel inverter to produce 13 levels by two DC sources. The proposed multilevel is designed based on two back to back TType modules with some switches around them. The proposed module is named K-Type. The configuration of K-type provides two extra DC links by capacitors (as the virtual DC supply) to achieve more levels to create staircase waveform. The module needs lower components including two DC sources, two capacitors, 14 semiconductors. It can be used in power applications with unequal DC sources (with ratio 1:2). It can also be easily modularized in two strategies in cascade arrangements to form high voltage outputs with low stress on semiconductors and lowering the number of devices. This ability can be used in some special applications such as solar farm along with a lot of DC sources. DC sources can also have different voltage amplitudes. In the conventional methods, it should be considered one inverter for each DC resources and fix the output voltage the same amplitude. It increases complexity and losses from this aspect, but in asymmetrical multilevel converters, it is possible to combine some DC resources together and generate a unique AC output. It reduces the number of separated inverter, components, losses and etc. The other advantage of K-Type module is its capability to generate both positive and negative output voltage without any additional circuit. Module is tested and it shows a good performance. THD% for one module is obtained 3.87% and 4.07% in simulation and experimental results, respectively that satisfy harmonics standard (IEEE519). THD% for cascade connection (two module) is calculated 1.99% in simulation and 2.26% in experimental results.

References

[1]Essakiappan, S.; Krishnamoorthy, H.S.; Enjeti, P.; Balog, R.S.; Ahmed, S., "Multilevel Medium-Frequency Link Inverter for Utility Scale Photovoltaic Integration," in Power Electronics, IEEE Transactions on , vol.30, no.7, pp.3674-3684, July 2015

[2]A. Nami, J. Liang, F. Dijkhuizen and G. D. Demetriades, "Modular Multilevel Converters for HVDC Applications: Review on Converter Cells and Functionalities," in IEEE Transactions on Power Electronics, vol. 30, no. 1, pp. 18-36, Jan. 2015.

[3]I. A. Gowaid, G. P. Adam, A. M. Massoud, S. Ahmed and B. W. Williams, "Hybrid and Modular Multilevel Converter Designs for Isolated HVDC–DC Converters," in IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 6, no. 1, pp. 188-202, March 2018.

 [4] Xibo Yuan, "A Set of Multilevel Modular Medium-Voltage High Power Converters for 10-MW Wind Turbines," in Sustainable Energy, IEEE Transactions on , vol.5, no.2, pp.524-534, April 2014

 [5] Ahmadi, D.; Jin Wang, "Online Selective Harmonic Compensation and Power Generation With Distributed Energy Resources," in Power Electronics, IEEE Transactions on , vol.29, no.7, pp.3738-3747, July 2014

A New Single-Stage Transformer less Inverter for Photovoltaic Applications

Abstract

In this paper a new single-stage transformer less inverter for photovoltaic (PV) application is proposed. Typical PV systems have multi-stage topology in order to perform different functions. These multi-stage inverters suffer from low efficiency and high components count. The proposed inverter is a combination of boost converter and half bridge inverter which can handle voltage boosting as well as feeding ac current to the grid in one stage. The introduced converter is transformer less which increases the overall efficiency and decreases cost, size and weight of the system. This topology has several desirable features like low switching losses, low total harmonic distortion (THD) and simple control technique. In this paper, operation principle, theoretical analysis and design of the proposed topology are discussed. Also, simulation and experimental results of a l00W inverter are presented to confirm the validity of theoretical analysis.

Keywords

1.      Photovoltaic inverter

2.      Transformer less inverter

3.      Single-stage inverter

Schematic Diagram:

Fig. 1. Schematic of proposed single-stage transfonnerless inverter.

Expected Simulation Results:

Fig. 2. Simulation results of (a) current of inductors at the peak of output voltage, and (b) voltage and current of switch S ,.

Fig. 3. Simulated waveforms of (a) gate drive signals, and (b) output voltage at fullioad .

Conclusion

In this paper a new single-stage inverter which is suitable for PV application is proposed. Due to omitting galvanic isolation, the cost, size and weight of the system is reduced. Simple structure, low switching losses and easy control scheme are the main features of the presented inverter. The operation principle is disused and the inverter design is presented. Also the control scheme is presented. Simulation and experimental results demonstrates the high performance of the proposed system. Due to boosting ability and achieving low-voltage THD, this topology is suitable for PV grid connected systems.

References

[I] L. Hassaine, E. OLias, J. Quintero and V. Salas, "Overview of power inverter topologies and control structures for grid connected photovoltaic systems," Renewable and Sustainable Energy Reviews, vol. 30, pp. 796-807,2014.

 [2] S. S. Nag and S. Mishra, "A coupled inductor based high boost inverter with sub-unity turns-Ratio range," IEEE Trans. Power Electron., vol. 31, no. ll, pp. 7534-7543,2016.

[3] Y. Zhou and W. Huang, "Single-stage boost inverter with coupled inductor," IEEE Trans. Power Electron., vol. 27, no. 4, pp. 1885-1893, 2012.

[4] A. Darwish, A. M. Massoud, D. Holliday, S. Ahmed and B. W. Williams, "Single-stage three-phase diflerential-mode buck-boost inverters with continuous input current for PV applications," IEEE Trans. Power Electron., vol. 31, no. 12, pp. 8218-8236,2016.

 [5] Y. Zhou, W. Huang, P. Zhao and J. Zhao, "Coupled-inductor singlestage boost inverter for grid-connected photovoltaic system," lET Power Electron., vol. 7, no. 2, pp. 259-270, 2014

Sliding Mode Control of Single-Phase Grid Connected Quasi-Z-Source Inverter

 Abstract

Quasi-Z-source inverters (qZSI) are nowadays increasingly used owing to advantages like single stage operation, lower component rating, and continuous input current, and common DC rail. These benefits lead to investigate this converter for grid connected applications. This paper presents a grid connected quasi-Z-source inverter (qZSI) with both AC and DC side control. Sliding Mode Control (SMC) based controller for capacitor voltage regulation has been proposed to ensure a fast and dynamic response for wide variations in input voltage, output load, and reference controlled quantity. A detailed mathematical model of the system is presented. A stable and fast response of SMC has been demonstrated using simulation and is validated by experimental results.

Index Terms

1. Quasi-Z-Source Inverter
2. Sliding Mode Control (SMC)
3. Grid connected system

Schematic Diagram:

Fig. 1. Proposed grid connected quasi-Z-Source Inverter with closed loop control.

Expected Simulation Results:

Fig. 2. Simulation results for step change in input voltage from 250V to 300V (a) Input voltage (b) Capacitor voltage.

Fig. 3. Simulation results for step change in capacitor reference voltage from 400V to 500V (a) Capacitor voltage (b) Grid voltage and current..

Fig. 4. Comparison of Simulation results for step change in capacitor reference voltage (a) PI Controller (b) SM Controller.

Fig. 5. Simulation results for step change in grid feed current from 0.5A to 1.5A (a) Capacitor voltage (b) Grid voltage and current.

Conclusion

In this paper, SMC is used for controlling the dynamic response of the grid connected qZSI system. The detailed mathematical analysis of the SMC is done. Various aspects of the controller, are discussed in the paper, which include the selection method of the sliding surface, and the existence condition. The simulation and experimental result shows that the capacitor voltage controller gives a very fast response to a step change in reference value. Also, the controller is stable and robust for wide variations in input and output. A comparison of the proposed controller, with the PI controller, also clearly, proves the superiority, of the SMC based controller, over the classical controller.

References

[1] F. Z. Peng, ‘‘Z-source inverter,’’ IEEE Trans. Ind. Appl., vol. 39, no. 2, pp. 504-510, 2003. [2] P. C. Loh, D. M. Vilathgamuwa, Y. S. Lai, G. T. Chua, and Y. Li, ‘‘Pulse-width modulation of Z-source inverters,” IEEE Trans. Power Electron., vol. 20, no. 6, pp. 1346-1355, Nov. 2005.

[3] M. S. Shen, J. Wang, A. Joseph, F. Z. Peng, L. M. Tolbert, D. J. Adams, “Constant Boost Control of the Z-Source Inverter to Minimize Current Ripple and Voltage Stress,” IEEE Trans. on Ind. Appl., vol. 42, no. 3, pp. 770-778, 2006.

[4] V. P. Galigekere, M. K. Kazimierczuk, “Analysis of PWM Z-source DC-DC converter in CCM for steady state,” IEEE Trans. Circuits Syst. I, vol. 59, no. 4, pp. 854–863, Apr. 2012.

[5] R. Badin, Y. Huang, F. Z. Peng, H. G. Kim, “Grid Interconnected ZSource PV System,” in Proc. IEEE PESC 2007, Orlando, FL, pp. 2328-2333, 2007.

A 15 Level Multilevel Inverter with Reduced Number of Switches

Abstract - A new multilevel inverter with reduced number of power switches is proposed. This new multilevel inverter based on cascaded H-bridge topology. This paper reduces total harmonic distortion (THD). This paper proposes a new concept of switching with reduced number of batteries. This concept helps to reduce the complexity of switching compared to other multilevel inverters. Proposed multilevel inverter having fifteen level output is validated with a simple resistive load. The proposed idea has been validated through simulation.

Index Terms

1.      Cascaded H-bridge

2.      15 level inverter

3.      reduced  Switches

Block Diagram:

Fig1.Block diagram of proposed inverter

Expected simulation results:

 

Fig 2: Firing Pulses to Switches S1, S2, S3

Fig.3. Firing Pulses to Switches S4, S5, S6 and S7

 

Fig.4.Simulation output with R load of 15 level

Fig.5.Simulation output with RL load of 15 level

Conclusion

A single phase 15 level reduced switch MLI topology is introduced by various types of operation are studied. A novel SPWM modulation approach is proposed and utilized an proposed topology, the simulation results are verified with a FPGA IP Core Processor based Hardware prototype. The results for the proposed system are explained in the below:

1. The proposed MLI uses only 7switches to give 15 level Output

2. It shown the simulation results that the THD for the Output voltages and current of the proposed system is low and compared to the existing.

3. The proposed system may be used to convert 3-phase 3- line system.

4. For low and medium power applications typical MLI cannot compete with standard UPS at lower level configurations and to the circuit complexity.

The inverter expands by increases the level with minimum number of switches, the overall price is reduced and inverter generates high output voltage. In this paper, fifteen level asymmetric cascaded multilevel inverter is proposed. It generates sinusoidal waveform and generates high voltage .It improves the performance of cascaded multilevel inverter .in this type switching losses are reduced and the total harmonic distortion also reduced.

References

[1] Nabae; I. Takahashi; H. Akagi. ―A new neutralpoint-clamped PWM inverter‖, IEEE Trans. onIndustry Applications, vol. 17, no. 5,pp. 518- 523, 1981.

[2] C.Bharatiraja, R.Latha, Dr.S.Jeevananthan,S.Raghu and Dr.S.S.Dash,”Design And Validation Of Simple Space Vector PWM Scheme For Three-Level NPC - MLI With Investigation Of Dc Link ImbalanceUsing FPGA IP Core‖, Journal of ElectricalEngineering, vol. 13, edition 1, pp 54-63, 2013.

[3] Rodriguez, J.; Jih-Sheng Lai ; Fang ZhengPeng.”Multilevel inverters: a survey of topologies, controls,and applications‖, IEEE Transactions on IndustrialElectronics, vol. 49, no. 4, pp 724-738

[4] P.Jamuna; Dr.C.ChristoberAsirRajan “NewAsymmetrical Multilevel Inverter Based Dynamic Voltage Restorer‖ Journal of Electrical Engineering,vol. 13, edition 1, pp 244-252, 2013.

[5] Nikhil; V.K.; Joseph, K.D. "A Reduced SwitchMultilevel Inverter for Harmonic Reduction", Powerand Energy Engineering Conference (APPEEC), Asia-Pacific, pp 1-4, 2012.