Abstract
Design and Implementation Multilevel inverters with a high device count, low boosting and DC voltage imbalance are all common problems exists in the traditional topologies. In this article, a new single-phase asymmetrical multilevel inverter (MLI) that can generate 33 levels at the output with fewer components and lower total standing voltage (TSV) at the switches is presented. The multiple input sources of the proposed inverter make it suited for the use in renewable energy generating systems which have a variety of DC sources. The stress distribution among the switches is investigated that reduces the use of high rated devices with which overall cost of the inverter gets reduced. The topology can be extended by adding the circuits in series for higher levels. The performance of the inverter is calculated considering a variety of critical parameters such as TSV, cost function (CF), power loss, and efficiency calculations. The MLI is tested under dynamic load conditions with sudden load disturbances with a range of combinational loads and it has been determined to be stable throughout its operation. A detailed comparison is made based on stress across the switches, stress distribution, switches count, DC sources count, gate driver circuits, component count factor, TSV, CF, and other existing topologies using graphical representations and shown to be cost-effective and superior in all aspects. The total harmonic distortion (THD) derived from simulation and experiment complies with IEEE standards. The proposed framework has been developed in MATLAB/Simulink and tested in a laboratory environment with hardware.
Index Terms
Multilevel inverter, maximum blocking voltage (MBV), total standing voltage (TSV), normalised voltage stress (NVS), stress distribution, cost function (CF), total harmonic distortion (THD).
Proposed Diagram:

Figure 1. Proposed 33-Level Mli Topology.
Expected Simulation Results:

Figure 2. Simulation Thd For The Proposed 33-Level Mli.

Figure 3. Simulation Output Of Modulation Index Variation.

Figure 4. Experimental Circuit Of The Proposed 33-Level Mli.
Conclusion
Design and Implementation The proposed new asymmetrical MLI topology that can able to generate 33 voltage levels is implemented with reduced components and less TSV. A detailed stress distribution across the switches is analyzed with which the low voltage rated switches are selected, which decreases the cost and size of the inverter. An extended circuit is designed for higher output voltage levels. The developed MLI is compared with other existing MLI architectures considering several parameters for estimation of its performance and found to be superior. The MLI requires fewer power switches with less DC sources count for the generation of higher output levels. TSVPU of the MLI is 3.31, only 25% of the switches are under maximum stress. Hence the cost of the inverter gets reduced. The comparisons represents that the proposed MLI has low TSV, cost-effective and efficient. As the unequal DC sources and low-rated switches are utilized in this topology, it is feasible for various hybrid energy storage and electric vehicle applications. For evaluating the performance of the MLI, it is tested for dynamically loaded conditions and found to be stable throughout its operation. Both simulation and experimental THD obtained is 2.03% with an efficiency of 95.2%, cost function _ is 3.11 and 3.51 respectively, which is less when compared with other existing topologies. The proposed topology can be extended for the solar PV applications with various ratings of PV panels for the multiple inputs.
References
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